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authorJuergen Ributzka <juergen@apple.com>2014-09-18 07:04:49 +0000
committerJuergen Ributzka <juergen@apple.com>2014-09-18 07:04:49 +0000
commit2fc851002b34f6b30e947f82611f4331cd38c93d (patch)
tree14da79825954b0926d0150651bda69b008aa35f1 /llvm/lib/Target/AArch64/AArch64FastISel.cpp
parenta33070c3218a91925e98b62b976830c1c4bafc53 (diff)
downloadbcm5719-llvm-2fc851002b34f6b30e947f82611f4331cd38c93d.tar.gz
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[FastISel][AArch64] Followup commit for 218031 to handle negative offsets too.
llvm-svn: 218032
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64FastISel.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64FastISel.cpp10
1 files changed, 7 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index ff56209d2ff..cb0fa958a5a 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -917,11 +917,15 @@ bool AArch64FastISel::simplifyAddress(Address &Addr, MVT VT) {
// Since the offset is too large for the load/store instruction get the
// reg+offset into a register.
if (ImmediateOffsetNeedsLowering) {
- unsigned ResultReg = 0;
+ unsigned ResultReg;
if (Addr.getReg()) {
// Try to fold the immediate into the add instruction.
- ResultReg = emitAddSub_ri(/*UseAdd=*/true, MVT::i64, Addr.getReg(),
- /*IsKill=*/false, Offset);
+ if (Offset < 0)
+ ResultReg = emitAddSub_ri(/*UseAdd=*/false, MVT::i64, Addr.getReg(),
+ /*IsKill=*/false, -Offset);
+ else
+ ResultReg = emitAddSub_ri(/*UseAdd=*/true, MVT::i64, Addr.getReg(),
+ /*IsKill=*/false, Offset);
if (!ResultReg) {
unsigned ImmReg = fastEmit_i(MVT::i64, MVT::i64, ISD::Constant, Offset);
ResultReg = emitAddSub_rr(/*UseAdd=*/true, MVT::i64, Addr.getReg(),
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