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author | Tim Northover <tnorthover@apple.com> | 2018-12-17 17:25:53 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2018-12-17 17:25:53 +0000 |
commit | 256a16d0314c78b0ee3612e01d0cafbf6c83de7b (patch) | |
tree | ac50144a309aa5c7f1387e827ab9c582c9be4055 /llvm/lib/Target/AArch64/AArch64FastISel.cpp | |
parent | 2d6833c9c9e447e5a0a5fa0b0fa9db18b3dd8111 (diff) | |
download | bcm5719-llvm-256a16d0314c78b0ee3612e01d0cafbf6c83de7b.tar.gz bcm5719-llvm-256a16d0314c78b0ee3612e01d0cafbf6c83de7b.zip |
FastIsel: take care to update iterators when removing instructions.
We keep a few iterators into the basic block we're selecting while
performing FastISel. Usually this is fine, but occasionally code wants
to remove already-emitted instructions. When this happens we have to be
careful to update those iterators so they're not pointint at dangling
memory.
llvm-svn: 349365
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64FastISel.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64FastISel.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index dfc08a12f51..7a7b0dd20a4 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -2016,8 +2016,9 @@ bool AArch64FastISel::selectLoad(const Instruction *I) { if (RetVT == MVT::i64 && VT <= MVT::i32) { if (WantZExt) { // Delete the last emitted instruction from emitLoad (SUBREG_TO_REG). - std::prev(FuncInfo.InsertPt)->eraseFromParent(); - ResultReg = std::prev(FuncInfo.InsertPt)->getOperand(0).getReg(); + MachineBasicBlock::iterator I(std::prev(FuncInfo.InsertPt)); + ResultReg = std::prev(I)->getOperand(0).getReg(); + removeDeadCode(I, std::next(I)); } else ResultReg = fastEmitInst_extractsubreg(MVT::i32, ResultReg, /*IsKill=*/true, @@ -2038,7 +2039,8 @@ bool AArch64FastISel::selectLoad(const Instruction *I) { break; } } - MI->eraseFromParent(); + MachineBasicBlock::iterator I(MI); + removeDeadCode(I, std::next(I)); MI = nullptr; if (Reg) MI = MRI.getUniqueVRegDef(Reg); @@ -4508,7 +4510,8 @@ bool AArch64FastISel::optimizeIntExtLoad(const Instruction *I, MVT RetVT, MI->getOperand(1).getSubReg() == AArch64::sub_32) && "Expected copy instruction"); Reg = MI->getOperand(1).getReg(); - MI->eraseFromParent(); + MachineBasicBlock::iterator I(MI); + removeDeadCode(I, std::next(I)); } updateValueMap(I, Reg); return true; |