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authorSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-13 11:38:10 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2018-10-13 11:38:10 +0000
commitf3952413f7fbdc9b8dc4f0825c64fb0faade0bae (patch)
treef075b5520c9f7ea3395f8bb160878857845f20c9 /llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
parentaf1f374ecea7a177fd0ee9b73b2b4f413b9bb430 (diff)
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[X86][AVX] Add lowerVectorShuffleAsLanePermuteAndPermute for v4f64 shuffles (PR39161)
Add shuffle lowering for the case where we can shuffle the lanes into place followed by an in-lane permute. This is mainly for cases where we can have non-repeating permutes in each lane, but for now I've just enabled it for v4f64 unary shuffles to fix PR39161 - there is no test coverage for other shuffles that might benefit yet. We now have several cross-lane shuffle lowering methods that all do something similar - I've looked at merging some of these (notably by making the repeated mask mechanism in lowerVectorShuffleByMerging128BitLanes optional), but there is a lot of assertions/assumptions in the way that makes this tricky - I ended up going for adding yet another relatively simple method instead. Differential Revision: https://reviews.llvm.org/D53148 llvm-svn: 344446
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