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authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-09-14 20:43:16 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-09-14 20:43:16 +0000
commit1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3 (patch)
tree27b082ad9831ad1d7dbddbd99b4c07e76e1db43e /llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
parent0ac172d8ede295c30946f6af2dafb68c7c7aa201 (diff)
downloadbcm5719-llvm-1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3.tar.gz
bcm5719-llvm-1b9fc8ed659589ee2f1d010adfd63f3d890c6ec3.zip
Finish renaming remaining analyzeBranch functions
llvm-svn: 281535
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp b/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
index e2e5511a1a2..9142f3ed9b2 100644
--- a/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
+++ b/llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp
@@ -300,9 +300,9 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
DEBUG(dbgs() << " Invert condition and swap "
"its destination with " << MBB->back());
- TII->ReverseBranchCondition(Cond);
+ TII->reverseBranchCondition(Cond);
int OldSize = 0, NewSize = 0;
- TII->RemoveBranch(*MBB, &OldSize);
+ TII->removeBranch(*MBB, &OldSize);
TII->insertBranch(*MBB, FBB, TBB, Cond, DL, &NewSize);
BlockInfo[MBB->getNumber()].Size += (NewSize - OldSize);
@@ -340,8 +340,8 @@ bool AArch64BranchRelaxation::fixupConditionalBranch(MachineInstr &MI) {
// Insert a new conditional branch and a new unconditional branch.
int RemovedSize = 0;
- TII->ReverseBranchCondition(Cond);
- TII->RemoveBranch(*MBB, &RemovedSize);
+ TII->reverseBranchCondition(Cond);
+ TII->removeBranch(*MBB, &RemovedSize);
MBBSize -= RemovedSize;
int AddedSize = 0;
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