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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-23 22:05:45 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-23 22:05:45 +0000 |
| commit | 20f6c0732f8b9e50c66dcb1f65782bd0124b5f5c (patch) | |
| tree | ef6216dd361f58ecba1e4d9e00bc8cbe4f93e4a3 /llvm/lib/TableGen/TGParser.cpp | |
| parent | f9317f15861fbcce774e9ccec71d8aefb3a03e56 (diff) | |
| download | bcm5719-llvm-20f6c0732f8b9e50c66dcb1f65782bd0124b5f5c.tar.gz bcm5719-llvm-20f6c0732f8b9e50c66dcb1f65782bd0124b5f5c.zip | |
R600/SI: Move i64 -> v2i32 load promotion into AMDGPUDAGToDAGISel::Select()
We used to do this promotion during DAG legalization, but this
caused an infinite loop in ExpandUnalignedLoad() because it assumed
that i64 loads were legal if i64 was a legal type.
It also seems better to report i64 loads as legal, since they actually
are and we were just promoting them to simplify our tablegen files.
llvm-svn: 226945
Diffstat (limited to 'llvm/lib/TableGen/TGParser.cpp')
0 files changed, 0 insertions, 0 deletions
