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| author | Craig Topper <craig.topper@intel.com> | 2018-04-05 18:38:45 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-05 18:38:45 +0000 |
| commit | 9eec2025c51fa916faa21f4f822bebd4016c11f1 (patch) | |
| tree | 31e080e96e9c8cd980c58f62c53c8ada9143ad60 /llvm/lib/TableGen/TGLexer.cpp | |
| parent | 9893fe218ccb9a3ae9531e01befc1e8fbb7b8320 (diff) | |
| download | bcm5719-llvm-9eec2025c51fa916faa21f4f822bebd4016c11f1.tar.gz bcm5719-llvm-9eec2025c51fa916faa21f4f822bebd4016c11f1.zip | |
[X86] Synchronize the SchedRW on some EVEX instructions with their VEX equivalents.
Mostly vector load, store, and move instructions.
llvm-svn: 329330
Diffstat (limited to 'llvm/lib/TableGen/TGLexer.cpp')
0 files changed, 0 insertions, 0 deletions
