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| author | Javed Absar <javed.absar@arm.com> | 2016-10-07 12:06:40 +0000 |
|---|---|---|
| committer | Javed Absar <javed.absar@arm.com> | 2016-10-07 12:06:40 +0000 |
| commit | fb4b6e8db988a620b692cd502687c738024362b5 (patch) | |
| tree | 413c16d8285f4762b26ee20994c5a0c44227449a /llvm/lib/Support | |
| parent | f03039fb4de75833d6e1accf9e0622d0b3bcd6e6 (diff) | |
| download | bcm5719-llvm-fb4b6e8db988a620b692cd502687c738024362b5.tar.gz bcm5719-llvm-fb4b6e8db988a620b692cd502687c738024362b5.zip | |
[ARM]: Add Cortex-R52 target to LLVM
This patch adds Cortex-R52, the new ARM real-time processor, to LLVM.
Cortex-R52 implements the ARMv8-R architecture.
llvm-svn: 283542
Diffstat (limited to 'llvm/lib/Support')
| -rw-r--r-- | llvm/lib/Support/TargetParser.cpp | 3 | ||||
| -rw-r--r-- | llvm/lib/Support/Triple.cpp | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp index a1d4aaa1890..42fab671a25 100644 --- a/llvm/lib/Support/TargetParser.cpp +++ b/llvm/lib/Support/TargetParser.cpp @@ -578,6 +578,7 @@ static StringRef getArchSynonym(StringRef Arch) { .Cases("v8", "v8a", "aarch64", "arm64", "v8-a") .Case("v8.1a", "v8.1-a") .Case("v8.2a", "v8.2-a") + .Case("v8r", "v8-r") .Case("v8m.base", "v8-m.base") .Case("v8m.main", "v8-m.main") .Default(Arch); @@ -721,6 +722,7 @@ unsigned llvm::ARM::parseArchProfile(StringRef Arch) { case ARM::AK_ARMV8MBaseline: return ARM::PK_M; case ARM::AK_ARMV7R: + case ARM::AK_ARMV8R: return ARM::PK_R; case ARM::AK_ARMV7A: case ARM::AK_ARMV7K: @@ -768,6 +770,7 @@ unsigned llvm::ARM::parseArchVersion(StringRef Arch) { case ARM::AK_ARMV8A: case ARM::AK_ARMV8_1A: case ARM::AK_ARMV8_2A: + case ARM::AK_ARMV8R: case ARM::AK_ARMV8MBaseline: case ARM::AK_ARMV8MMainline: return 8; diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp index 1470563a6e9..19d278d4578 100644 --- a/llvm/lib/Support/Triple.cpp +++ b/llvm/lib/Support/Triple.cpp @@ -550,6 +550,8 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) { return Triple::ARMSubArch_v8_1a; case ARM::AK_ARMV8_2A: return Triple::ARMSubArch_v8_2a; + case ARM::AK_ARMV8R: + return Triple::ARMSubArch_v8r; case ARM::AK_ARMV8MBaseline: return Triple::ARMSubArch_v8m_baseline; case ARM::AK_ARMV8MMainline: |
