diff options
| author | Craig Topper <craig.topper@intel.com> | 2019-09-04 16:01:43 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-04 16:01:43 +0000 |
| commit | 5465875e9361b58a357c118884ca09340236a664 (patch) | |
| tree | fb5d26e5c3f9ab5e0193cdaf1f4a8becd3e3d9d1 /llvm/lib/Support | |
| parent | b8cfdcfd9d79ee3c4aebd322a86d53bde1e69281 (diff) | |
| download | bcm5719-llvm-5465875e9361b58a357c118884ca09340236a664.tar.gz bcm5719-llvm-5465875e9361b58a357c118884ca09340236a664.zip | |
[X86] Add support for avx512bf16 for __builtin_cpu_supports and compiler-rt's cpu indicator.
llvm-svn: 370915
Diffstat (limited to 'llvm/lib/Support')
| -rw-r--r-- | llvm/lib/Support/Host.cpp | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index ef10b9689e8..0d6fab50424 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -680,7 +680,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, // Skylake Xeon: case 0x55: *Type = X86::INTEL_COREI7; - if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64))) + if (Features2 & (1 << (X86::FEATURE_AVX512BF16 - 32))) *Subtype = X86::INTEL_COREI7_COOPERLAKE; // "cooperlake" else if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) *Subtype = X86::INTEL_COREI7_CASCADELAKE; // "cascadelake" @@ -765,7 +765,7 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, break; } - if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64))) { + if (Features2 & (1 << (X86::FEATURE_AVX512BF16 - 32))) { *Type = X86::INTEL_COREI7; *Subtype = X86::INTEL_COREI7_COOPERLAKE; break; @@ -1088,6 +1088,11 @@ static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf, if (HasLeaf7 && ((EDX >> 8) & 1) && HasAVX512Save) setFeature(X86::FEATURE_AVX512VP2INTERSECT); + bool HasLeaf7Subleaf1 = + MaxLeaf >= 7 && !getX86CpuIDAndInfoEx(0x7, 0x1, &EAX, &EBX, &ECX, &EDX); + if (HasLeaf7Subleaf1 && ((EAX >> 5) & 1) && HasAVX512Save) + setFeature(X86::FEATURE_AVX512BF16); + unsigned MaxExtLevel; getX86CpuIDAndInfo(0x80000000, &MaxExtLevel, &EBX, &ECX, &EDX); |
