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authorRon Lieberman <ronlieb.g@gmail.com>2018-11-16 01:13:34 +0000
committerRon Lieberman <ronlieb.g@gmail.com>2018-11-16 01:13:34 +0000
commitcac749ac884cfab87a0b2a805b43530c26a627c8 (patch)
tree483b52cfd6f80f9842c2ce8132146e9dd1b798e0 /llvm/lib/Support/VirtualFileSystem.cpp
parent5d14b72d5c3f5169fd896ce91378e377f464b18b (diff)
downloadbcm5719-llvm-cac749ac884cfab87a0b2a805b43530c26a627c8.tar.gz
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[AMDGPU] Add FixupVectorISel pass, currently Supports SREGs in GLOBAL LD/ST
Add a pass to fixup various vector ISel issues. Currently we handle converting GLOBAL_{LOAD|STORE}_* and GLOBAL_Atomic_* instructions into their _SADDR variants. This involves feeding the sreg into the saddr field of the new instruction. llvm-svn: 347008
Diffstat (limited to 'llvm/lib/Support/VirtualFileSystem.cpp')
0 files changed, 0 insertions, 0 deletions
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