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authorCraig Topper <craig.topper@intel.com>2018-02-23 20:13:42 +0000
committerCraig Topper <craig.topper@intel.com>2018-02-23 20:13:42 +0000
commit61d6ddbf0abf6e841344c231450c7929e259161d (patch)
tree7d504114dd1b368fc63546a0f70432e81f184830 /llvm/lib/Support/Unix/Unix.h
parent39049c05a99372410ed1ad5e032b65f62242fca7 (diff)
downloadbcm5719-llvm-61d6ddbf0abf6e841344c231450c7929e259161d.tar.gz
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[X86] Add DAG combine to remove (and X, 1) from in front of a v1i1 scalar to vector.
These can be created by type legalization promoting the inputs to select to match scalar boolean contents. We were trying to pattern match them away during isel, but its better to just remove them from the DAG. I've cleaned up some patterns to not check for this 'and' anymore. But I suspect this has also opened up opportunities for pattern removal. llvm-svn: 325949
Diffstat (limited to 'llvm/lib/Support/Unix/Unix.h')
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