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| author | John Brawn <john.brawn@arm.com> | 2015-06-05 13:31:19 +0000 |
|---|---|---|
| committer | John Brawn <john.brawn@arm.com> | 2015-06-05 13:31:19 +0000 |
| commit | 985c04e8fafb2489b1fa960ebba5383e9d77e91e (patch) | |
| tree | 215d41abf1ba44c40d02312d62bc70d9f72f10ca /llvm/lib/Support/TargetParser.cpp | |
| parent | d03d22922dee3bdb039c5926c49c4e1e5da5a734 (diff) | |
| download | bcm5719-llvm-985c04e8fafb2489b1fa960ebba5383e9d77e91e.tar.gz bcm5719-llvm-985c04e8fafb2489b1fa960ebba5383e9d77e91e.zip | |
[ARM] Add support for -sp- FPUs and FPU none to TargetParser
These are added mainly for the benefit of clang, but this also means that they
are now allowed in .fpu directives and we emit the correct .fpu directive when
single-precision-only is used.
Differential Revision: http://reviews.llvm.org/D10238
llvm-svn: 239151
Diffstat (limited to 'llvm/lib/Support/TargetParser.cpp')
| -rw-r--r-- | llvm/lib/Support/TargetParser.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Support/TargetParser.cpp b/llvm/lib/Support/TargetParser.cpp index c2f521f323c..70dc7134840 100644 --- a/llvm/lib/Support/TargetParser.cpp +++ b/llvm/lib/Support/TargetParser.cpp @@ -33,13 +33,16 @@ struct { ARM::FPURestriction Restriction; } FPUNames[] = { { "invalid", ARM::FK_INVALID, 0, ARM::NS_None, ARM::FR_None}, + { "none", ARM::FK_NONE, 0, ARM::NS_None, ARM::FR_None}, { "vfp", ARM::FK_VFP, 2, ARM::NS_None, ARM::FR_None}, { "vfpv2", ARM::FK_VFPV2, 2, ARM::NS_None, ARM::FR_None}, { "vfpv3", ARM::FK_VFPV3, 3, ARM::NS_None, ARM::FR_None}, { "vfpv3-d16", ARM::FK_VFPV3_D16, 3, ARM::NS_None, ARM::FR_D16}, { "vfpv4", ARM::FK_VFPV4, 4, ARM::NS_None, ARM::FR_None}, { "vfpv4-d16", ARM::FK_VFPV4_D16, 4, ARM::NS_None, ARM::FR_D16}, + { "fpv4-sp-d16", ARM::FK_FPV4_SP_D16, 4, ARM::NS_None, ARM::FR_SP_D16}, { "fpv5-d16", ARM::FK_FPV5_D16, 5, ARM::NS_None, ARM::FR_D16}, + { "fpv5-sp-d16", ARM::FK_FPV5_SP_D16, 5, ARM::NS_None, ARM::FR_SP_D16}, { "fp-armv8", ARM::FK_FP_ARMV8, 5, ARM::NS_None, ARM::FR_None}, { "neon", ARM::FK_NEON, 3, ARM::NS_Neon, ARM::FR_None}, { "neon-vfpv4", ARM::FK_NEON_VFPV4, 4, ARM::NS_Neon, ARM::FR_None}, @@ -376,10 +379,9 @@ StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) { .Case("vfp4", "vfpv4") .Case("vfp3-d16", "vfpv3-d16") .Case("vfp4-d16", "vfpv4-d16") - // FIXME: sp-16 is NOT the same as d16 - .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16") + .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16") .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16") - .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16") + .Case("fp5-sp-d16", "fpv5-sp-d16") .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16") // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3. .Case("neon-vfpv3", "neon") |
