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| author | Craig Topper <craig.topper@intel.com> | 2018-01-18 23:52:31 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-18 23:52:31 +0000 |
| commit | 84b26b90d14abc404ff8a4305fbf9ab119f19232 (patch) | |
| tree | 84e444e070c4a0a695d91beebb09ffe3b200cbd8 /llvm/lib/Support/Host.cpp | |
| parent | 4b7cf1601a3f1a90c2665f2067af72319243af33 (diff) | |
| download | bcm5719-llvm-84b26b90d14abc404ff8a4305fbf9ab119f19232.tar.gz bcm5719-llvm-84b26b90d14abc404ff8a4305fbf9ab119f19232.zip | |
[X86] Add intrinsic support for the RDPID instruction
This adds a new instrinsic to support the rdpid instruction. The implementation is a bit weird because the intrinsic is defined as always returning 32-bits, but the assembler support thinks the instruction produces a 64-bit register in 64-bit mode. But really it zeros the upper 32 bits. So I had to add separate patterns where 64-bit mode uses an extract_subreg.
Differential Revision: https://reviews.llvm.org/D42205
llvm-svn: 322910
Diffstat (limited to 'llvm/lib/Support/Host.cpp')
| -rw-r--r-- | llvm/lib/Support/Host.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index 3dc67ad782a..695683efa62 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -1255,7 +1255,9 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) { Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save; Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save; Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save; - Features["ibt"] = HasLeaf7 && ((EDX >> 20) & 1); + Features["rdpid"] = HasLeaf7 && ((ECX >> 22) & 1); + + Features["ibt"] = HasLeaf7 && ((EDX >> 20) & 1); bool HasLeafD = MaxLevel >= 0xd && !getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX); |
