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authorMichael Zuckerman <Michael.zuckerman@intel.com>2017-06-29 10:00:33 +0000
committerMichael Zuckerman <Michael.zuckerman@intel.com>2017-06-29 10:00:33 +0000
commit4bcb9c334953fc62c0b10385d4d5fd72d594bafa (patch)
tree7971f6f9721f5a2571ea4b3550479b9b575cbb49 /llvm/lib/Support/Host.cpp
parent6936506f504c30733b402b738a2280e34a896003 (diff)
downloadbcm5719-llvm-4bcb9c334953fc62c0b10385d4d5fd72d594bafa.tar.gz
bcm5719-llvm-4bcb9c334953fc62c0b10385d4d5fd72d594bafa.zip
[LLVM][X86][Goldmont] Adding new target-cpu: Goldmont
[LLVM SIDE] Connecting the GoldMont processor to his feature. Reviewers: 1. igorb 2. zvi 3. delena 4. RKSimon 5. craig.topper Differential Revision: https://reviews.llvm.org/D34504 llvm-svn: 306658
Diffstat (limited to 'llvm/lib/Support/Host.cpp')
-rw-r--r--llvm/lib/Support/Host.cpp10
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 234f7439a54..232efe648b0 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -327,6 +327,7 @@ enum ProcessorSubtypes {
INTEL_COREI7_SKYLAKE_AVX512,
INTEL_ATOM_BONNELL,
INTEL_ATOM_SILVERMONT,
+ INTEL_ATOM_GOLDMONT,
INTEL_KNIGHTS_LANDING,
AMDPENTIUM_K6,
AMDPENTIUM_K62,
@@ -707,7 +708,12 @@ getIntelProcessorTypeAndSubtype(unsigned int Family, unsigned int Model,
*Type = INTEL_ATOM;
*Subtype = INTEL_ATOM_SILVERMONT;
break; // "silvermont"
-
+ // Goldmont:
+ case 0x5c:
+ case 0x5f:
+ *Type = INTEL_ATOM;
+ *Subtype = INTEL_ATOM_GOLDMONT;
+ break; // "goldmont"
case 0x57:
*Type = INTEL_XEONPHI; // knl
*Subtype = INTEL_KNIGHTS_LANDING;
@@ -1070,6 +1076,8 @@ StringRef sys::getHostCPUName() {
switch (Subtype) {
case INTEL_ATOM_BONNELL:
return "bonnell";
+ case INTEL_ATOM_GOLDMONT:
+ return "goldmont";
case INTEL_ATOM_SILVERMONT:
return "silvermont";
default:
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