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authorCraig Topper <craig.topper@intel.com>2019-05-22 19:51:35 +0000
committerCraig Topper <craig.topper@intel.com>2019-05-22 19:51:35 +0000
commit2f1895e03d9ee89f247c8830dcabaf6060d73c74 (patch)
tree923833481a6816bf33d621292bc9e75683dd0a0e /llvm/lib/Support/Host.cpp
parent9d9e406684de7ae2da5c3ee2a45eca80eb0e3534 (diff)
downloadbcm5719-llvm-2f1895e03d9ee89f247c8830dcabaf6060d73c74.tar.gz
bcm5719-llvm-2f1895e03d9ee89f247c8830dcabaf6060d73c74.zip
[X86] Add more icelake model numbers to getHostCPUName.
Using model numbers found in Table 2-1 of the May 2019 version of the Intel Software Developer's Manual Volume 4. llvm-svn: 361422
Diffstat (limited to 'llvm/lib/Support/Host.cpp')
-rw-r--r--llvm/lib/Support/Host.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index d47b4d6a419..542ebe9e537 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -682,11 +682,19 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model,
break;
// Icelake:
+ case 0x7d:
case 0x7e:
*Type = X86::INTEL_COREI7;
*Subtype = X86::INTEL_COREI7_ICELAKE_CLIENT; // "icelake-client"
break;
+ // Icelake Xeon:
+ case 0x6a:
+ case 0x6c:
+ *Type = X86::INTEL_COREI7;
+ *Subtype = X86::INTEL_COREI7_ICELAKE_SERVER; // "icelake-server"
+ break;
+
case 0x1c: // Most 45 nm Intel Atom processors
case 0x26: // 45 nm Atom Lincroft
case 0x27: // 32 nm Atom Medfield
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