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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-29 01:13:41 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-08-29 01:13:41 +0000 |
| commit | 8ec5c1004265f5da323dfc3b2fe929c0557804c8 (patch) | |
| tree | ed4e7ccdd02a5194fa63028a3e9fcbe4be96cc48 /llvm/lib/Support/CRC.cpp | |
| parent | e4a7f0182d4017593504982d72725c6fefa5c903 (diff) | |
| download | bcm5719-llvm-8ec5c1004265f5da323dfc3b2fe929c0557804c8.tar.gz bcm5719-llvm-8ec5c1004265f5da323dfc3b2fe929c0557804c8.zip | |
GlobalISel/TableGen: Handle setcc patterns
This is a special case because one node maps to two different G_
instructions, and the operand order is changed.
This mostly enables G_FCMP for AMDPGPU. G_ICMP is still manually
selected for now since it has the SALU and VALU complication to deal
with.
llvm-svn: 370280
Diffstat (limited to 'llvm/lib/Support/CRC.cpp')
0 files changed, 0 insertions, 0 deletions
