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authorMatthias Braun <matze@braunis.de>2018-01-24 00:39:53 +0000
committerMatthias Braun <matze@braunis.de>2018-01-24 00:39:53 +0000
commit70fd374d1ed1070758f078d3e00537d88da2c9fc (patch)
tree729836209b541993433675452f306cd56fed319a /llvm/lib/Object
parent971f87a806de7a22ab94775aaf9d9bb07d5a47d8 (diff)
downloadbcm5719-llvm-70fd374d1ed1070758f078d3e00537d88da2c9fc.tar.gz
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AArch64: Cyclone: Remove SlowMisaligned128Store tuning flag
Remove FeatureSlowMisaligned128Store from cyclone flags. This flag causes splitting of 16 byte wide stores into 2 stored of 8 bytes. This was useful on older apple CPUs which were slow for 16byte stores that were not aligned on 16byte. As the compiler often cannot predict the actual alignment, the splitting was choosen. This has been a topic for a lot of debate as the splitting also decreases performance for some benchmarks. Measuring the effects on newer apple chips (rdar://35525421) shows that it harms more cases than it helps. So it is time to retire this workaround. llvm-svn: 323289
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