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| author | Craig Topper <craig.topper@intel.com> | 2018-01-01 04:52:58 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-01 04:52:58 +0000 |
| commit | 0d35edda90be3972c86cf2d40d007f2418338e93 (patch) | |
| tree | efec95e6961d593f6ff50f05c038fe0d1bdb17d5 /llvm/lib/Object/IRObjectFile.cpp | |
| parent | c535adcfc5dd5773366329cb86af38931393df5a (diff) | |
| download | bcm5719-llvm-0d35edda90be3972c86cf2d40d007f2418338e93.tar.gz bcm5719-llvm-0d35edda90be3972c86cf2d40d007f2418338e93.zip | |
[X86] In LowerTruncateVecI1, don't add SHL if the input is known to be all sign bits.
If the input is all sign bits then the LSB through MSB are all the same so we don't need to be move the LSB to the MSB.
llvm-svn: 321617
Diffstat (limited to 'llvm/lib/Object/IRObjectFile.cpp')
0 files changed, 0 insertions, 0 deletions
