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| author | Craig Topper <craig.topper@gmail.com> | 2015-12-05 07:13:35 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2015-12-05 07:13:35 +0000 |
| commit | e5e035a3a86a8491b4e05395b73ec257438dc4af (patch) | |
| tree | f2e2be1ac726e2830bcde551a8ff0bd160e108b5 /llvm/lib/MC | |
| parent | 58ee28410a29d9cd084c03d2dfb22aba53ef4029 (diff) | |
| download | bcm5719-llvm-e5e035a3a86a8491b4e05395b73ec257438dc4af.tar.gz bcm5719-llvm-e5e035a3a86a8491b4e05395b73ec257438dc4af.zip | |
Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical register arrays already use this typedef.
llvm-svn: 254843
Diffstat (limited to 'llvm/lib/MC')
| -rw-r--r-- | llvm/lib/MC/MCInstrDesc.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/MC/MCParser/AsmParser.cpp | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/MC/MCInstrDesc.cpp b/llvm/lib/MC/MCInstrDesc.cpp index 5be2fa1b30b..ee55f3eff3a 100644 --- a/llvm/lib/MC/MCInstrDesc.cpp +++ b/llvm/lib/MC/MCInstrDesc.cpp @@ -53,7 +53,7 @@ bool MCInstrDesc::mayAffectControlFlow(const MCInst &MI, bool MCInstrDesc::hasImplicitDefOfPhysReg(unsigned Reg, const MCRegisterInfo *MRI) const { - if (const uint16_t *ImpDefs = ImplicitDefs) + if (const MCPhysReg *ImpDefs = ImplicitDefs) for (; *ImpDefs; ++ImpDefs) if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs))) return true; diff --git a/llvm/lib/MC/MCParser/AsmParser.cpp b/llvm/lib/MC/MCParser/AsmParser.cpp index 8e8be8e52f6..61f7d749b96 100644 --- a/llvm/lib/MC/MCParser/AsmParser.cpp +++ b/llvm/lib/MC/MCParser/AsmParser.cpp @@ -4753,8 +4753,8 @@ bool AsmParser::parseMSInlineAsm( } // Consider implicit defs to be clobbers. Think of cpuid and push. - ArrayRef<uint16_t> ImpDefs(Desc.getImplicitDefs(), - Desc.getNumImplicitDefs()); + ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(), + Desc.getNumImplicitDefs()); ClobberRegs.insert(ClobberRegs.end(), ImpDefs.begin(), ImpDefs.end()); } |
