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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2015-05-16 01:02:25 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2015-05-16 01:02:25 +0000
commit41e14c4dfa63c45271cb42368d09b5a94ee16e4f (patch)
tree5e7a107f111783e01368026e3abc381b83e59490 /llvm/lib/MC/MachObjectWriter.cpp
parent5ed84cdba8351f86de6247410dcfc2ebdc88708c (diff)
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[PPC64] Add vector pack/unpack support from ISA 2.07
This patch adds support for the following new instructions in the Power ISA 2.07: vpksdss vpksdus vpkudus vpkudum vupkhsw vupklsw These instructions are available through the vec_packs, vec_packsu, vec_unpackh, and vec_unpackl built-in interfaces. These are lane-sensitive instructions, so the built-ins have different implementations for big- and little-endian, and the instructions must be marked as killing the vector swap optimization for now. The first three instructions perform saturating pack operations. The fourth performs a modulo pack operation, which means it can be represented with a vector shuffle, and conversely the appropriate vector shuffles may cause this instruction to be generated. The other instructions are only generated via built-in support for now. I noticed during patch preparation that the macro __VSX__ was not previously predefined when the power8-vector or direct-move features are requested. This is an error, and I've corrected that here as well. Appropriate tests have been added. There is a companion patch to llvm for the rest of this support. llvm-svn: 237500
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