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authorJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-18 21:10:50 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2010-05-18 21:10:50 +0000
commit663543b4d7042dd9b4056ab59ae30d0bfc005c3e (patch)
treecff844e6886e41b30e0b52e6c0514b7c6b2a5994 /llvm/lib/MC/MCParser/AsmParser.cpp
parent49be9e0819a5c05bf82695be28e21f71b8adda3e (diff)
downloadbcm5719-llvm-663543b4d7042dd9b4056ab59ae30d0bfc005c3e.tar.gz
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Properly handle multiple definitions of a virtual register in the same
instruction. This can happen on ARM: >> %reg1035:5<def>, %reg1035:6<def> = VLD1q16 %reg1028, 0, pred:14, pred:%reg0 Regs: Q0=%reg1032* R0=%reg1028* R1=%reg1029* R2 R3=%reg1031* Killing last use: %reg1028 Allocating %reg1035 from QPR Assigning %reg1035 to Q1 << %D2<def>, %D3<def> = VLD1q16 %R0<kill>, 0, pred:14, pred:%reg0, %Q1<imp-def> llvm-svn: 104056
Diffstat (limited to 'llvm/lib/MC/MCParser/AsmParser.cpp')
0 files changed, 0 insertions, 0 deletions
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