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authorSean Callanan <scallanan@apple.com>2012-02-04 07:45:35 +0000
committerSean Callanan <scallanan@apple.com>2012-02-04 07:45:35 +0000
commitbdce3885c4e1c1b96d30cf76d005d661401fbe03 (patch)
tree7c31fedf12d676ca7e342aa563cc3e90c781a7b4 /llvm/lib/MC/MCDisassembler/EDOperand.cpp
parent8dd3425077ba7d49b922f37158217a6905ca4692 (diff)
downloadbcm5719-llvm-bdce3885c4e1c1b96d30cf76d005d661401fbe03.tar.gz
bcm5719-llvm-bdce3885c4e1c1b96d30cf76d005d661401fbe03.zip
Modified the Enhanced Disassembler to create and
cache disassemblers according to the string value of the target triple, not according to the enum of the triple CPU. The reason for this is that certain attributes of the instruction set are not reflected in the enum, but only in the string. llvm-svn: 149773
Diffstat (limited to 'llvm/lib/MC/MCDisassembler/EDOperand.cpp')
-rw-r--r--llvm/lib/MC/MCDisassembler/EDOperand.cpp16
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/MC/MCDisassembler/EDOperand.cpp b/llvm/lib/MC/MCDisassembler/EDOperand.cpp
index 9aededb676e..48b374659d5 100644
--- a/llvm/lib/MC/MCDisassembler/EDOperand.cpp
+++ b/llvm/lib/MC/MCDisassembler/EDOperand.cpp
@@ -30,8 +30,10 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
MCOpIndex(mcOpIndex) {
unsigned int numMCOperands = 0;
- if (Disassembler.Key.Arch == Triple::x86 ||
- Disassembler.Key.Arch == Triple::x86_64) {
+ Triple::ArchType arch = Disassembler.TgtTriple.getArch();
+
+ if (arch == Triple::x86 ||
+ arch == Triple::x86_64) {
uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
switch (operandType) {
@@ -54,8 +56,8 @@ EDOperand::EDOperand(const EDDisassembler &disassembler,
break;
}
}
- else if (Disassembler.Key.Arch == Triple::arm ||
- Disassembler.Key.Arch == Triple::thumb) {
+ else if (arch == Triple::arm ||
+ arch == Triple::thumb) {
uint8_t operandType = inst.ThisInstInfo->operandTypes[opIndex];
switch (operandType) {
@@ -126,7 +128,9 @@ int EDOperand::evaluate(uint64_t &result,
void *arg) {
uint8_t operandType = Inst.ThisInstInfo->operandTypes[OpIndex];
- switch (Disassembler.Key.Arch) {
+ Triple::ArchType arch = Disassembler.TgtTriple.getArch();
+
+ switch (arch) {
default:
return -1;
case Triple::x86:
@@ -168,7 +172,7 @@ int EDOperand::evaluate(uint64_t &result,
unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg();
- if (segmentReg != 0 && Disassembler.Key.Arch == Triple::x86_64) {
+ if (segmentReg != 0 && arch == Triple::x86_64) {
unsigned fsID = Disassembler.registerIDWithName("FS");
unsigned gsID = Disassembler.registerIDWithName("GS");
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