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| author | Craig Topper <craig.topper@intel.com> | 2017-12-24 02:05:18 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-24 02:05:18 +0000 |
| commit | f65a6e4ed827fbbec486ab3d6d4a3e56a2311016 (patch) | |
| tree | 2d558f4c8dedd23e30bcfb34f3aba63e3cc55dc0 /llvm/lib/MC/MCDisassembler/Disassembler.cpp | |
| parent | 2e308a9b2f871b48b393179d68742f1b51ab9ff1 (diff) | |
| download | bcm5719-llvm-f65a6e4ed827fbbec486ab3d6d4a3e56a2311016.tar.gz bcm5719-llvm-f65a6e4ed827fbbec486ab3d6d4a3e56a2311016.zip | |
[DAGCombiners] Don't turn ANDs to shuffles with zero so early. Give some other combines a chance to run.
This moves the combine for turning ANDs into shuffle with zero out of SimplifyVBinOps and places it only in visitAND below the reassociate handling. This fixes the specific case I noticed where we failed to combine two ands with constants.
llvm-svn: 321417
Diffstat (limited to 'llvm/lib/MC/MCDisassembler/Disassembler.cpp')
0 files changed, 0 insertions, 0 deletions
