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authorOwen Anderson <resistor@mac.com>2010-12-15 18:48:27 +0000
committerOwen Anderson <resistor@mac.com>2010-12-15 18:48:27 +0000
commit622ad5170beb7299a1588251d61476f02e7ccc05 (patch)
tree889aff7827f6afcbfc411392bba9e27524b65a05 /llvm/lib/MC/MCAssembler.cpp
parentb3f04f468efab0852ac2e442da0c6bb4eeac0711 (diff)
downloadbcm5719-llvm-622ad5170beb7299a1588251d61476f02e7ccc05.tar.gz
bcm5719-llvm-622ad5170beb7299a1588251d61476f02e7ccc05.zip
Implement cleanups suggested by Daniel.
llvm-svn: 121875
Diffstat (limited to 'llvm/lib/MC/MCAssembler.cpp')
-rw-r--r--llvm/lib/MC/MCAssembler.cpp18
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/MC/MCAssembler.cpp b/llvm/lib/MC/MCAssembler.cpp
index 0fbd77c7f12..0d114fb7314 100644
--- a/llvm/lib/MC/MCAssembler.cpp
+++ b/llvm/lib/MC/MCAssembler.cpp
@@ -248,14 +248,18 @@ bool MCAssembler::EvaluateFixup(const MCObjectWriter &Writer,
if (IsResolved)
IsResolved = Writer.IsFixupFullyResolved(*this, Target, IsPCRel, DF);
+ bool ShouldAlignPC = Emitter.getFixupKindInfo(Fixup.getKind()).Flags &
+ MCFixupKindInfo::FKF_IsAlignedDownTo32Bits;
+ assert((ShouldAlignPC ? IsPCRel : true) &&
+ "FKF_IsAlignedDownTo32Bits is only allowed on PC-relative fixups!");
+
if (IsPCRel) {
- bool ShouldAlignPC = Emitter.getFixupKindInfo(
- Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsAligned;
- // PC should be aligned to a 4-byte value.
- if (ShouldAlignPC)
- Value -= Layout.getFragmentOffset(DF) + (Fixup.getOffset() & ~0x3);
- else
- Value -= Layout.getFragmentOffset(DF) + Fixup.getOffset();
+ uint32_t Offset = Fixup.getOffset();
+
+ // A number of ARM fixups in Thumb mode require that the effective PC
+ // address be determined as the 32-bit aligned version of the actual offset.
+ if (ShouldAlignPC) Offset &= 0x3;
+ Value -= Layout.getFragmentOffset(DF) + Offset;
}
// ARM fixups based from a thumb function address need to have the low
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