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authorDaniel Sanders <daniel.sanders@imgtec.com>2014-07-14 12:41:31 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2014-07-14 12:41:31 +0000
commit24e08fd5c069371920ec3997e045e082302e55db (patch)
tree4ec7b69e192db75f5e47b68100e19b828ec678a9 /llvm/lib/MC/MCAssembler.cpp
parent3064620d0d5bd14ec7faf1bec0ec49f650981e85 (diff)
downloadbcm5719-llvm-24e08fd5c069371920ec3997e045e082302e55db.tar.gz
bcm5719-llvm-24e08fd5c069371920ec3997e045e082302e55db.zip
[mips] Use MFHC1 when it is available (MIPS32r2 and later) for both FP32 and FP64 moves
Summary: This is similar to r210771 which did the same thing for MTHC1. Also corrected MTHC1_D32 and MTHC1_D64 which used AFGR64 and FGR64 on the wrong definitions. Differential Revision: http://reviews.llvm.org/D4483 llvm-svn: 212936
Diffstat (limited to 'llvm/lib/MC/MCAssembler.cpp')
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