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authorChandler Carruth <chandlerc@gmail.com>2011-12-24 12:12:34 +0000
committerChandler Carruth <chandlerc@gmail.com>2011-12-24 12:12:34 +0000
commita3d54fe0aefb21fda70fece3b7a61ad0b1fc9fdf (patch)
tree096e469d8fab02000d1733caa2429abb0279d59f /llvm/lib/MC/MCAsmBackend.cpp
parent38ce24455df1800496d11f6d809c56a8f1feb307 (diff)
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Use standard promotion for i8 CTTZ nodes and i8 CTLZ nodes when the
LZCNT instructions are available. Force promotion to i32 to get a smaller encoding since the fix-ups necessary are just as complex for either promoted type We can't do standard promotion for CTLZ when lowering through BSR because it results in poor code surrounding the 'xor' at the end of this instruction. Essentially, if we promote the entire CTLZ node to i32, we end up doing the xor on a 32-bit CTLZ implementation, and then subtracting appropriately to get back to an i8 value. Instead, our custom logic just uses the knowledge of the incoming size to compute a perfect xor. I'd love to know of a way to fix this, but so far I'm drawing a blank. I suspect the legalizer could be more clever and/or it could collude with the DAG combiner, but how... ;] llvm-svn: 147251
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