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authorTim Northover <tnorthover@apple.com>2019-09-12 10:22:23 +0000
committerTim Northover <tnorthover@apple.com>2019-09-12 10:22:23 +0000
commitf1c28929125400a1680868f7c6eea720de256779 (patch)
tree0ef7b4fac0adf3a403b55134b9df4a89616efaaa /llvm/lib/LTO/LTOCodeGenerator.cpp
parent98534843fb4c14ebe8022143cdcfc2a4ea8d2d02 (diff)
downloadbcm5719-llvm-f1c28929125400a1680868f7c6eea720de256779.tar.gz
bcm5719-llvm-f1c28929125400a1680868f7c6eea720de256779.zip
AArch64: support arm64_32, an ILP32 slice for watchOS.
This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM. FastISel is mostly disabled for now since it would generate incorrect code for ILP32. llvm-svn: 371722
Diffstat (limited to 'llvm/lib/LTO/LTOCodeGenerator.cpp')
-rw-r--r--llvm/lib/LTO/LTOCodeGenerator.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/LTO/LTOCodeGenerator.cpp b/llvm/lib/LTO/LTOCodeGenerator.cpp
index bd03184b03c..199c6994992 100644
--- a/llvm/lib/LTO/LTOCodeGenerator.cpp
+++ b/llvm/lib/LTO/LTOCodeGenerator.cpp
@@ -365,7 +365,8 @@ bool LTOCodeGenerator::determineTarget() {
MCpu = "core2";
else if (Triple.getArch() == llvm::Triple::x86)
MCpu = "yonah";
- else if (Triple.getArch() == llvm::Triple::aarch64)
+ else if (Triple.getArch() == llvm::Triple::aarch64 ||
+ Triple.getArch() == llvm::Triple::aarch64_32)
MCpu = "cyclone";
}
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