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| author | Dimitry Andric <dimitry@andric.com> | 2018-02-17 21:04:35 +0000 |
|---|---|---|
| committer | Dimitry Andric <dimitry@andric.com> | 2018-02-17 21:04:35 +0000 |
| commit | 2e3f23bbccc65d7f79ab8f57fe2b5391c4bf2caf (patch) | |
| tree | 2e4218a21ceccf30c3a8b0aa5e30fddfa5adc618 /llvm/lib/IR/ModuleSummaryIndex.cpp | |
| parent | b3107476a416bdfc284a17d4a20706bc0d435eb8 (diff) | |
| download | bcm5719-llvm-2e3f23bbccc65d7f79ab8f57fe2b5391c4bf2caf.tar.gz bcm5719-llvm-2e3f23bbccc65d7f79ab8f57fe2b5391c4bf2caf.zip | |
[X86] Add 'sahf' CPU feature to frontend
Summary:
Make clang accept `-msahf` (and `-mno-sahf`) flags to activate the
`+sahf` feature for the backend, for bug 36028 (Incorrect use of
pushf/popf enables/disables interrupts on amd64 kernels). This was
originally submitted in bug 36037 by Jonathan Looney
<jonlooney@gmail.com>.
As described there, GCC also uses `-msahf` for this feature, and the
backend already recognizes the `+sahf` feature. All that is needed is to
teach clang to pass this on to the backend.
The mapping of feature support onto CPUs may not be complete; rather, it
was chosen to match LLVM's idea of which CPUs support this feature (see
lib/Target/X86/X86.td).
I also updated the affected test case (CodeGen/attr-target-x86.c) to
match the emitted output.
Reviewers: craig.topper, coby, efriedma, rsmith
Reviewed By: craig.topper
Subscribers: emaste, cfe-commits
Differential Revision: https://reviews.llvm.org/D43394
llvm-svn: 325446
Diffstat (limited to 'llvm/lib/IR/ModuleSummaryIndex.cpp')
0 files changed, 0 insertions, 0 deletions
