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| author | Simon Atanasyan <simon@atanasyan.com> | 2018-11-16 05:30:47 +0000 |
|---|---|---|
| committer | Simon Atanasyan <simon@atanasyan.com> | 2018-11-16 05:30:47 +0000 |
| commit | 275a5b442b1de63502641ffcec65eb983ffc8233 (patch) | |
| tree | aab616c87dc20b0346d1cdb7dcaf9b000a5d48fb /llvm/lib/IR/ModuleSummaryIndex.cpp | |
| parent | eabb8dd01547c6fcccb7dcbba7a4a3b8ba67694c (diff) | |
| download | bcm5719-llvm-275a5b442b1de63502641ffcec65eb983ffc8233.tar.gz bcm5719-llvm-275a5b442b1de63502641ffcec65eb983ffc8233.zip | |
[ELF][MIPS] Use MIPS R6 `sigrie` as a trap instruction
Current value using as a trap instruction (0xefefefef) is not a good choice
for MIPS because it's a valid MIPS instruction `swc3 $15,-4113(ra)`. This
patch replaces 0xefefefef by 0x04170001. For all MIPS ISA revisions before
R6, this value is just invalid instruction. Starting from MIPS R6 it's
a valid instruction `sigrie 1` which signals a Reserved Instruction exception.
mips-traps.s test case is added to test trap encoding. Other test cases
are modified to remove redundant checking.
Differential revision: https://reviews.llvm.org/D54154
llvm-svn: 347029
Diffstat (limited to 'llvm/lib/IR/ModuleSummaryIndex.cpp')
0 files changed, 0 insertions, 0 deletions
