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| author | Michael Liao <michael.liao@intel.com> | 2013-03-01 18:40:30 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-03-01 18:40:30 +0000 |
| commit | 6af16fc3b7d0355ca43b838ef79faaa63c44b6b5 (patch) | |
| tree | 4ba86621fb61c4e2323158ec1261600f9cd91344 /llvm/lib/IR/Module.cpp | |
| parent | 9660343b423ecce2cac5b125f87d145bb3cd12b4 (diff) | |
| download | bcm5719-llvm-6af16fc3b7d0355ca43b838ef79faaa63c44b6b5.tar.gz bcm5719-llvm-6af16fc3b7d0355ca43b838ef79faaa63c44b6b5.zip | |
Fix PR10475
- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
but TLI.getShiftAmountTy() so far only return scalar type. As a
result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
return target-specificed scalar type or the same vector type as the
1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
type.
llvm-svn: 176364
Diffstat (limited to 'llvm/lib/IR/Module.cpp')
0 files changed, 0 insertions, 0 deletions
