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authorAlexandros Lamprineas <alexandros.lamprineas@arm.com>2016-10-10 16:01:54 +0000
committerAlexandros Lamprineas <alexandros.lamprineas@arm.com>2016-10-10 16:01:54 +0000
commit20e9ddba7349b556e43daab7433f2a3a7c649417 (patch)
tree8f7d5c15ad03995244edb98dbbc6226f4caa993f /llvm/lib/IR/LLVMContextImpl.cpp
parent0c21b40d37d559800490560ad4037f792cf69fab (diff)
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[ARM] Fix invalid VLDM/VSTM access when targeting Big Endian with NEON
The instructions VLDM/VSTM can only access word-aligned memory locations and produce alignment fault if the condition is not met. The compiler currently generates VLDM/VSTM for v2f64 load/store regardless the alignment of the memory access. Instead, if a v2f64 load/store is not word-aligned, the compiler should generate VLD1/VST1. For each non double-word-aligned VLD1/VST1, a VREV instruction should be generated when targeting Big Endian. Differential Revision: https://reviews.llvm.org/D25281 llvm-svn: 283763
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