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| author | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-03-11 10:48:52 +0000 |
| commit | e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc (patch) | |
| tree | 054bf7c2cdd888931fdabadb91d82dbb78b05f2b /llvm/lib/IR/Instruction.cpp | |
| parent | aab3cfe023752c32da984afb281d322d631ad298 (diff) | |
| download | bcm5719-llvm-e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc.tar.gz bcm5719-llvm-e94a518a22db4b21f4a4a9e34173a11e9dfc5fcc.zip | |
IR: add a second ordering operand to cmpxhg for failure
The syntax for "cmpxchg" should now look something like:
cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic
where the second ordering argument gives the required semantics in the case
that no exchange takes place. It should be no stronger than the first ordering
constraint and cannot be either "release" or "acq_rel" (since no store will
have taken place).
rdar://problem/15996804
llvm-svn: 203559
Diffstat (limited to 'llvm/lib/IR/Instruction.cpp')
| -rw-r--r-- | llvm/lib/IR/Instruction.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp index bd7a62e83d9..d31a92e0317 100644 --- a/llvm/lib/IR/Instruction.cpp +++ b/llvm/lib/IR/Instruction.cpp @@ -313,7 +313,10 @@ bool Instruction::isIdenticalToWhenDefined(const Instruction *I) const { FI->getSynchScope() == cast<FenceInst>(FI)->getSynchScope(); if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(this)) return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I)->isVolatile() && - CXI->getOrdering() == cast<AtomicCmpXchgInst>(I)->getOrdering() && + CXI->getSuccessOrdering() == + cast<AtomicCmpXchgInst>(I)->getSuccessOrdering() && + CXI->getFailureOrdering() == + cast<AtomicCmpXchgInst>(I)->getFailureOrdering() && CXI->getSynchScope() == cast<AtomicCmpXchgInst>(I)->getSynchScope(); if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(this)) return RMWI->getOperation() == cast<AtomicRMWInst>(I)->getOperation() && @@ -384,7 +387,10 @@ bool Instruction::isSameOperationAs(const Instruction *I, FI->getSynchScope() == cast<FenceInst>(I)->getSynchScope(); if (const AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(this)) return CXI->isVolatile() == cast<AtomicCmpXchgInst>(I)->isVolatile() && - CXI->getOrdering() == cast<AtomicCmpXchgInst>(I)->getOrdering() && + CXI->getSuccessOrdering() == + cast<AtomicCmpXchgInst>(I)->getSuccessOrdering() && + CXI->getFailureOrdering() == + cast<AtomicCmpXchgInst>(I)->getFailureOrdering() && CXI->getSynchScope() == cast<AtomicCmpXchgInst>(I)->getSynchScope(); if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(this)) return RMWI->getOperation() == cast<AtomicRMWInst>(I)->getOperation() && |
