[RuntimeDyld][MachO] Fix assertion in encodeAddend, add missing directive to

test case.

r326290 fixed the assertion for decodeAddend, but not encodeAddend. The
regression test failed to catch this because it was missing the
subsections_via_symbols flag, so the desired relocation was not applied.

This patch also fixes the formatting of the assertion from r326290.

llvm-svn: 326406

1 files changed, 5 insertions, 3 deletions

diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h b/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
index 86acf513de3..31cedffa15b 100644
--- a/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
+++ b/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
@@ -69,8 +69,8 @@ public:
       // Verify that the relocation points to a B/BL instruction.
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
       assert(((*p & 0xFC000000) == 0x14000000 ||
-	      (*p & 0xFC000000) == 0x94000000)
-	     && "Expected branch instruction.");
+              (*p & 0xFC000000) == 0x94000000) &&
+             "Expected branch instruction.");
 
       // Get the 26 bit addend encoded in the branch instruction and sign-extend
       // to 64 bit. The lower 2 bits are always zeros and are therefore implicit
@@ -166,7 +166,9 @@ public:
     case MachO::ARM64_RELOC_BRANCH26: {
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
       // Verify that the relocation points to the expected branch instruction.
-      assert((*p & 0xFC000000) == 0x14000000 && "Expected branch instruction.");
+      assert(((*p & 0xFC000000) == 0x14000000 ||
+              (*p & 0xFC000000) == 0x94000000) &&
+             "Expected branch instruction.");
 
       // Verify addend value.
       assert((Addend & 0x3) == 0 && "Branch target is not aligned");