[RuntimeDyld][MachO] Support ARM64_RELOC_BRANCH26 for BL instructions by

relaxing an assertion.

llvm-svn: 326290

1 files changed, 4 insertions, 2 deletions

diff --git a/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h b/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
index 97cbc153b22..86acf513de3 100644
--- a/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
+++ b/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOAArch64.h
@@ -66,9 +66,11 @@ public:
         Addend = *reinterpret_cast<support::ulittle64_t *>(LocalAddress);
       break;
     case MachO::ARM64_RELOC_BRANCH26: {
-      // Verify that the relocation points to the expected branch instruction.
+      // Verify that the relocation points to a B/BL instruction.
       auto *p = reinterpret_cast<support::aligned_ulittle32_t *>(LocalAddress);
-      assert((*p & 0xFC000000) == 0x14000000 && "Expected branch instruction.");
+      assert(((*p & 0xFC000000) == 0x14000000 ||
+	      (*p & 0xFC000000) == 0x94000000)
+	     && "Expected branch instruction.");
 
       // Get the 26 bit addend encoded in the branch instruction and sign-extend
       // to 64 bit. The lower 2 bits are always zeros and are therefore implicit