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| author | Craig Topper <craig.topper@intel.com> | 2018-09-06 23:55:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-09-06 23:55:36 +0000 |
| commit | 2c9dede9cba3af244322947357a5b2da644c4db1 (patch) | |
| tree | e45f072b5b86f27918e538200b9a9c3631f946ed /llvm/lib/DebugInfo/PDB/Native/NativeEnumModules.cpp | |
| parent | 37d68e4599677a57d0addf747ff3c30dfe39b14a (diff) | |
| download | bcm5719-llvm-2c9dede9cba3af244322947357a5b2da644c4db1.tar.gz bcm5719-llvm-2c9dede9cba3af244322947357a5b2da644c4db1.zip | |
[X86] Add RMW ADC patterns with load in operand 1.
ADC is commutable and the load could be in either operand, but we were only checking operand 0.
Ideally we'd mark X86adc_flag as commutable and tablegen would automatically do this, but the EFLAGS register mention is preventing it.
llvm-svn: 341606
Diffstat (limited to 'llvm/lib/DebugInfo/PDB/Native/NativeEnumModules.cpp')
0 files changed, 0 insertions, 0 deletions
