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author | Igor Breger <igor.breger@intel.com> | 2017-07-10 09:07:34 +0000 |
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committer | Igor Breger <igor.breger@intel.com> | 2017-07-10 09:07:34 +0000 |
commit | d48c5e485591d6cfcec979e80700967eb96c9979 (patch) | |
tree | 73cf9ee9a32b7822f1fa88a0d0d5c986f5edf19d /llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | |
parent | e436483855b99d3a4577fbfb60c38f29d0574ca6 (diff) | |
download | bcm5719-llvm-d48c5e485591d6cfcec979e80700967eb96c9979.tar.gz bcm5719-llvm-d48c5e485591d6cfcec979e80700967eb96c9979.zip |
[GlobalISel][X86] extend G_ZEXT support.
Summary:
Mark G_ZEXT/G_SEXT i1 to i8/i16, i8 to i16 as legal.
Support G_ZEXT i1 to i8/i16 instruction selection ( C++ code).
This patch requred to support G_LOAD/G_STORE i1.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D35177
llvm-svn: 307526
Diffstat (limited to 'llvm/lib/DebugInfo/DWARF/DWARFContext.cpp')
0 files changed, 0 insertions, 0 deletions