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| author | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2010-10-28 06:47:08 +0000 |
| commit | ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8 (patch) | |
| tree | 170667846f8da80d9444d3b1618f40bcdb257793 /llvm/lib/CodeGen | |
| parent | 0165e255640f63d467f58993ce922cfcad847866 (diff) | |
| download | bcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.tar.gz bcm5719-llvm-ff310737e5d5cbb5e29637f9d9f2c8a31a60afc8.zip | |
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
llvm-svn: 117531
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 0ffb4da0f36..d34a52d8014 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -454,6 +454,9 @@ void ScheduleDAGSDNodes::ComputeOperandLatency(SDNode *Def, SDNode *Use, return; unsigned DefIdx = Use->getOperand(OpIdx).getResNo(); + if (Use->isMachineOpcode()) + // Adjust the use operand index by num of defs. + OpIdx += TII->get(Use->getMachineOpcode()).getNumDefs(); int Latency = TII->getOperandLatency(InstrItins, Def, DefIdx, Use, OpIdx); if (Latency >= 0) dep.setLatency(Latency); |
