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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:37:26 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-09-30 23:37:26 +0000 |
| commit | f734fc2af7c20e2a77936df38ce281994c1fb540 (patch) | |
| tree | 7de4b7a747cf4f71d96cb232f1f5df66f90e51c0 /llvm/lib/CodeGen | |
| parent | 2b2ca42761ed8a8b4b1d6553c9d73411fc163ac3 (diff) | |
| download | bcm5719-llvm-f734fc2af7c20e2a77936df38ce281994c1fb540.tar.gz bcm5719-llvm-f734fc2af7c20e2a77936df38ce281994c1fb540.zip | |
Minor changes for bug fixes in SchedGraph.cpp.
llvm-svn: 677
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/InstrSched/SchedGraph.h | 24 |
1 files changed, 15 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/InstrSched/SchedGraph.h b/llvm/lib/CodeGen/InstrSched/SchedGraph.h index ef3b4df862b..76a7663cf80 100644 --- a/llvm/lib/CodeGen/InstrSched/SchedGraph.h +++ b/llvm/lib/CodeGen/InstrSched/SchedGraph.h @@ -33,7 +33,7 @@ class TargetMachine; class SchedGraphEdge; class SchedGraphNode; class SchedGraph; -class NodeToRegRefMap; +class RegToRefVecMap; class MachineInstr; /******************** Exported Data Types and Constants ********************/ @@ -61,9 +61,9 @@ protected: int minDelay; // cached latency (assumes fixed target arch) union { - Value* val; - int machineRegNum; - ResourceId resourceId; + const Value* val; + int machineRegNum; + ResourceId resourceId; }; public: @@ -79,7 +79,7 @@ public: // constructor for explicit def-use or memory def-use edge /*ctor*/ SchedGraphEdge(SchedGraphNode* _src, SchedGraphNode* _sink, - Value* _val, + const Value* _val, DataDepOrderType _depOrderType =TrueDep, int _minDelay = -1); @@ -293,8 +293,11 @@ private: // void buildGraph (const TargetMachine& target); - void addEdgesForInstruction (SchedGraphNode* node, - NodeToRegRefMap& regToRefVecMap, + void buildNodesforVMInstr (const TargetMachine& target, + const Instruction* instr); + + void addEdgesForInstruction (const MachineInstr& minstr, + RegToRefVecMap& regToRefVecMap, const TargetMachine& target); void addCDEdges (const TerminatorInst* term, @@ -303,11 +306,14 @@ private: void addMemEdges (const vector<const Instruction*>& memVec, const TargetMachine& target); - void addMachineRegEdges (NodeToRegRefMap& regToRefVecMap, + void addMachineRegEdges (RegToRefVecMap& regToRefVecMap, const TargetMachine& target); void addSSAEdge (SchedGraphNode* node, - Value* val, + const Value* val, + const TargetMachine& target); + + void addNonSSAEdgesForValue (const Instruction* instr, const TargetMachine& target); void addDummyEdges (); |

