[llvm][MIRVRegNamerUtil] Adding hashing against MachineInstr flags.

Now, flags will result in differing hashes for a given MI. In effect, if
you have two instructions with everything identical except for their
flags then you should get two different hashes and fewer collisions.

Differential Revision: https://reviews.llvm.org/D70479

1 files changed, 1 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
index 998d391bf83..be29f8cd64b 100644
--- a/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
+++ b/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp
@@ -69,7 +69,7 @@ std::string VRegRenamer::getInstructionOpcodeHash(MachineInstr &MI) {
     return 0;
   };
 
-  SmallVector<unsigned, 16> MIOperands = {MI.getOpcode()};
+  SmallVector<unsigned, 16> MIOperands = {MI.getOpcode(), MI.getFlags()};
   llvm::transform(MI.uses(), std::back_inserter(MIOperands), GetHashableMO);
 
   auto HashMI = hash_combine_range(MIOperands.begin(), MIOperands.end());