diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2011-10-11 23:48:44 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2011-10-11 23:48:44 +0000 |
| commit | f192ca0761291cfe87a47c4897149eaae39fdf61 (patch) | |
| tree | af4e9dde1057da01321c1e7819ccdc63bb66d306 /llvm/lib/CodeGen | |
| parent | 0f4ecf75486973a0c0eda5b07b3eb1895a0bb364 (diff) | |
| download | bcm5719-llvm-f192ca0761291cfe87a47c4897149eaae39fdf61.tar.gz bcm5719-llvm-f192ca0761291cfe87a47c4897149eaae39fdf61.zip | |
Refine r141689 with a tri-state variable.
Also teach MachineLICM to avoid "speculation" when register pressure is high.
llvm-svn: 141744
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 42 |
1 files changed, 23 insertions, 19 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 70da9828e67..63c73d2e4ec 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -91,10 +91,16 @@ namespace { // For each opcode, keep a list of potential CSE instructions. DenseMap<unsigned, std::vector<const MachineInstr*> > CSEMap; + enum { + SpeculateFalse = 0, + SpeculateTrue = 1, + SpeculateUnknown = 2 + }; + // If a MBB does not dominate loop exiting blocks then it may not safe // to hoist loads from this block. - bool CurrentMBBDominatesLoopExitingBlocks; - bool NeedToCheckMBBDominance; + // Tri-state: 0 - false, 1 - true, 2 - unknown + unsigned SpeculationState; public: static char ID; // Pass identification, replacement for typeid @@ -304,9 +310,6 @@ bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { MRI = &MF.getRegInfo(); InstrItins = TM->getInstrItineraryData(); AllocatableSet = TRI->getAllocatableSet(MF); - // Stay conservative. - CurrentMBBDominatesLoopExitingBlocks = false; - NeedToCheckMBBDominance = true; if (PreRegAlloc) { // Estimate register pressure during pre-regalloc pass. @@ -476,7 +479,7 @@ void MachineLICM::HoistRegionPostRA() { ++PhysRegDefs[*AS]; } - NeedToCheckMBBDominance = true; + SpeculationState = SpeculateUnknown; for (MachineBasicBlock::iterator MII = BB->begin(), E = BB->end(); MII != E; ++MII) { MachineInstr *MI = &*MII; @@ -573,25 +576,22 @@ void MachineLICM::HoistPostRA(MachineInstr *MI, unsigned Def) { // IsGuaranteedToExecute - Check if this mbb is guaranteed to execute. // If not then a load from this mbb may not be safe to hoist. bool MachineLICM::IsGuaranteedToExecute(MachineBasicBlock *BB) { - // Do not check if we already have checked it once. - if (NeedToCheckMBBDominance == false) - return CurrentMBBDominatesLoopExitingBlocks; - - NeedToCheckMBBDominance = false; - + if (SpeculationState != SpeculateUnknown) + return SpeculationState == SpeculateFalse; + if (BB != CurLoop->getHeader()) { // Check loop exiting blocks. SmallVector<MachineBasicBlock*, 8> CurrentLoopExitingBlocks; CurLoop->getExitingBlocks(CurrentLoopExitingBlocks); for (unsigned i = 0, e = CurrentLoopExitingBlocks.size(); i != e; ++i) if (!DT->dominates(BB, CurrentLoopExitingBlocks[i])) { - CurrentMBBDominatesLoopExitingBlocks = false; - return CurrentMBBDominatesLoopExitingBlocks; + SpeculationState = SpeculateTrue; + return false; } } - CurrentMBBDominatesLoopExitingBlocks = true; - return CurrentMBBDominatesLoopExitingBlocks; + SpeculationState = SpeculateFalse; + return true; } /// HoistRegion - Walk the specified region of the CFG (defined by all blocks @@ -620,7 +620,7 @@ void MachineLICM::HoistRegion(MachineDomTreeNode *N, bool IsHeader) { // Remember livein register pressure. BackTrace.push_back(RegPressure); - NeedToCheckMBBDominance = true; + SpeculationState = SpeculateUnknown; for (MachineBasicBlock::iterator MII = BB->begin(), E = BB->end(); MII != E; ) { MachineBasicBlock::iterator NextMII = MII; ++NextMII; @@ -1044,8 +1044,12 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) { // High register pressure situation, only hoist if the instruction is going to // be remat'ed. - if (!TII->isTriviallyReMaterializable(&MI, AA) && - !MI.isInvariantLoad(AA)) + // Also, do not "speculate" in high register pressure situation. If an + // instruction is not guaranteed to be executed in the loop, it's best to be + // conservative. + if (SpeculationState == SpeculateTrue || + (!TII->isTriviallyReMaterializable(&MI, AA) && + !MI.isInvariantLoad(AA))) return false; } |

