diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-11 15:23:22 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-09-11 15:23:22 +0000 |
| commit | eb4474cf20f22d23b05ec7d8a048d2d5cda32992 (patch) | |
| tree | 31bf04e5884358847f036f95739f2e59ec070aca /llvm/lib/CodeGen | |
| parent | 103a7b5bbb7138318134474603024a559a2df5ac (diff) | |
| download | bcm5719-llvm-eb4474cf20f22d23b05ec7d8a048d2d5cda32992.tar.gz bcm5719-llvm-eb4474cf20f22d23b05ec7d8a048d2d5cda32992.zip | |
Fix typo
llvm-svn: 312919
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/RegisterCoalescer.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/RegisterCoalescer.cpp b/llvm/lib/CodeGen/RegisterCoalescer.cpp index 4cc934540cb..bfa6758de61 100644 --- a/llvm/lib/CodeGen/RegisterCoalescer.cpp +++ b/llvm/lib/CodeGen/RegisterCoalescer.cpp @@ -1832,7 +1832,7 @@ bool RegisterCoalescer::joinReservedPhysReg(CoalescerPair &CP) { if (!MRI->isConstantPhysReg(DstReg)) { // We checked above that there are no interfering defs of the physical - // register. However, for this case, where we intent to move up the def of + // register. However, for this case, where we intend to move up the def of // the physical register, we also need to check for interfering uses. SlotIndexes *Indexes = LIS->getSlotIndexes(); for (SlotIndex SI = Indexes->getNextNonNullIndex(DestRegIdx); |
