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authorChris Lattner <sabre@nondot.org>2011-02-14 06:14:42 +0000
committerChris Lattner <sabre@nondot.org>2011-02-14 06:14:42 +0000
commiteaa8341d3be5f92b3166ce274cb962773b774a3e (patch)
treeeb4441aee410d99fff80040972c4950d8b52e21a /llvm/lib/CodeGen
parent00661a0b0333dda33003750b9a361217e7003557 (diff)
downloadbcm5719-llvm-eaa8341d3be5f92b3166ce274cb962773b774a3e.tar.gz
bcm5719-llvm-eaa8341d3be5f92b3166ce274cb962773b774a3e.zip
fix two comment thinkos
llvm-svn: 125481
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 501264f23d9..e8dbe4efb30 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2292,7 +2292,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
/// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
/// ISD::OR with a ConstantSDNode that is guaranteed to have the same
/// semantics as an ADD. This handles the equivalence:
-/// X|Cst == X+Cst iff X&~Cst = 0.
+/// X|Cst == X+Cst iff X&Cst = 0.
bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
!isa<ConstantSDNode>(Op.getOperand(1)))
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