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| author | Dan Gohman <gohman@apple.com> | 2009-04-10 15:59:38 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-04-10 15:59:38 +0000 |
| commit | e517ae4211d79b5d7c1d5bfac5c6335bf06b9064 (patch) | |
| tree | 15cfafef2767637a9aa3c27208f8acd179f362a6 /llvm/lib/CodeGen | |
| parent | 6758943615889a13bd8bd54ddd5979778f455616 (diff) | |
| download | bcm5719-llvm-e517ae4211d79b5d7c1d5bfac5c6335bf06b9064.tar.gz bcm5719-llvm-e517ae4211d79b5d7c1d5bfac5c6335bf06b9064.zip | |
Now that register classes have names, include the name in debug output.
llvm-svn: 68786
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp index 4ad36dac79a..abeb7f4dbf7 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp @@ -268,9 +268,11 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op, cerr << "Op->Val = "; Op.getNode()->dump(DAG); cerr << "\n"; cerr << "MI = "; MI->print(cerr); cerr << "VReg = " << VReg << "\n"; - cerr << "VReg RegClass size = " << VRC->getSize() + cerr << "VReg RegClass " << VRC->getName() + << " size = " << VRC->getSize() << ", align = " << VRC->getAlignment() << "\n"; - cerr << "Expected RegClass size = " << RC->getSize() + cerr << "Expected RegClass " << RC->getName() + << " size = " << RC->getSize() << ", align = " << RC->getAlignment() << "\n"; cerr << "Fatal error, aborting.\n"; abort(); |
