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author | Craig Topper <craig.topper@intel.com> | 2017-12-07 08:04:34 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-12-07 08:04:34 +0000 |
commit | dfecd45f371584b80d050d29955324ba37c6311f (patch) | |
tree | 944f68fc22832f04e176543942a4cafb8328e96f /llvm/lib/CodeGen | |
parent | 26ed8d1263d3762f00095a3ff3d7f13887dd2728 (diff) | |
download | bcm5719-llvm-dfecd45f371584b80d050d29955324ba37c6311f.tar.gz bcm5719-llvm-dfecd45f371584b80d050d29955324ba37c6311f.zip |
[SelectionDAG] In SplitVecOp_EXTRACT_VECTOR_ELT, simplify the code that makes the type byte addressable.
We can just extend the original vector to vXi1 and trust that the legalization process will revisit it.
llvm-svn: 320013
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 13 |
1 files changed, 2 insertions, 11 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index b574c1ea8b5..2ee83a193f3 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -1749,20 +1749,11 @@ SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) { // Make the vector elements byte-addressable if they aren't already. SDLoc dl(N); EVT EltVT = VecVT.getVectorElementType(); - if (EltVT.getSizeInBits() < 8) { - SmallVector<SDValue, 4> ElementOps; - for (unsigned i = 0; i < VecVT.getVectorNumElements(); ++i) { - ElementOps.push_back(DAG.getAnyExtOrTrunc( - DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Vec, - DAG.getConstant(i, dl, - TLI.getVectorIdxTy(DAG.getDataLayout()))), - dl, MVT::i8)); - } - + if (VecVT.getScalarSizeInBits() < 8) { EltVT = MVT::i8; VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, VecVT.getVectorNumElements()); - Vec = DAG.getBuildVector(VecVT, dl, ElementOps); + Vec = DAG.getNode(ISD::ANY_EXTEND, dl, VecVT, Vec); } // Store the vector to the stack. |