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authorAndrew Lenharth <andrewl@lenharth.org>2005-11-11 22:48:54 +0000
committerAndrew Lenharth <andrewl@lenharth.org>2005-11-11 22:48:54 +0000
commitde1b5d6baa0609913c5c74fdabc6ed8fefcd95b1 (patch)
tree205a1107f07660658cd0a6828aaf20e467a19fe7 /llvm/lib/CodeGen
parent5b3b9d7052ca360165ed92c4382fe30ed18ed4bb (diff)
downloadbcm5719-llvm-de1b5d6baa0609913c5c74fdabc6ed8fefcd95b1.tar.gz
bcm5719-llvm-de1b5d6baa0609913c5c74fdabc6ed8fefcd95b1.zip
added a chain output
llvm-svn: 24306
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp12
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index ae61e208963..01e76c1b423 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -804,9 +804,17 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
return 0;
}
- case Intrinsic::readcyclecounter:
- setValue(&I, DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, getRoot()));
+ case Intrinsic::readcyclecounter: {
+ std::vector<MVT::ValueType> VTs;
+ VTs.push_back(MVT::i64);
+ VTs.push_back(MVT::Other);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(getRoot());
+ SDOperand Tmp = DAG.getNode(ISD::READCYCLECOUNTER, VTs, Ops);
+ setValue(&I, Tmp);
+ DAG.setRoot(Tmp.getValue(1));
return 0;
+ }
case Intrinsic::cttz:
setValue(&I, DAG.getNode(ISD::CTTZ,
getValue(I.getOperand(1)).getValueType(),
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