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| author | Tim Northover <tnorthover@apple.com> | 2017-01-27 21:31:24 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2017-01-27 21:31:24 +0000 |
| commit | d8b85584f23b78788d4bf8cabe84224baa7029e6 (patch) | |
| tree | 176383364ffdbe62c13e8403342458961ffe08b1 /llvm/lib/CodeGen | |
| parent | c9bc8a55809d831d8a54381bfdebc88b8a0ed38c (diff) | |
| download | bcm5719-llvm-d8b85584f23b78788d4bf8cabe84224baa7029e6.tar.gz bcm5719-llvm-d8b85584f23b78788d4bf8cabe84224baa7029e6.zip | |
GlobalISel: set correct regclass for LOAD_STACK_GUARD.
Since it's not actually a generic MI, its register operands need a RegClass,
which is conveniently the target's pointer RegClass.
llvm-svn: 293335
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index ce3e682f14e..9382de77f88 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -477,6 +477,8 @@ bool IRTranslator::translateMemcpy(const CallInst &CI, void IRTranslator::getStackGuard(unsigned DstReg, MachineIRBuilder &MIRBuilder) { + const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); + MRI->setRegClass(DstReg, TRI->getPointerRegClass(*MF)); auto MIB = MIRBuilder.buildInstr(TargetOpcode::LOAD_STACK_GUARD); MIB.addDef(DstReg); |
