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authorSanjay Patel <spatel@rotateright.com>2017-03-28 22:22:50 +0000
committerSanjay Patel <spatel@rotateright.com>2017-03-28 22:22:50 +0000
commitd832eddde54c9493a72410bc244b5c2ebfa5af7c (patch)
treedf7e7d8358f9b41870d7ba927e9c5933563d3887 /llvm/lib/CodeGen
parentbaf31ac7c873147336440e8594c8ee552a17b662 (diff)
downloadbcm5719-llvm-d832eddde54c9493a72410bc244b5c2ebfa5af7c.tar.gz
bcm5719-llvm-d832eddde54c9493a72410bc244b5c2ebfa5af7c.zip
[DAGCombiner] remove redundant conditions and duplicated code; NFCI
llvm-svn: 298949
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp18
1 files changed, 8 insertions, 10 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 4ec917093a9..341778ad1dc 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3182,11 +3182,10 @@ SDValue DAGCombiner::foldAndOfSetCCs(SDValue N0, SDValue N1, const SDLoc &DL) {
ISD::CondCode CC1 = cast<CondCodeSDNode>(N1CC)->get();
EVT VT = N1.getValueType();
- if (LR == RR && isa<ConstantSDNode>(LR) && CC0 == CC1 &&
- LL.getValueType().isInteger()) {
+ if (LR == RR && CC0 == CC1 && LL.getValueType().isInteger()) {
+ EVT CCVT = getSetCCResultType(LR.getValueType());
// fold (and (seteq X, 0), (seteq Y, 0)) -> (seteq (or X, Y), 0)
if (isNullConstant(LR) && CC1 == ISD::SETEQ) {
- EVT CCVT = getSetCCResultType(LR.getValueType());
if (VT == CCVT || (!LegalOperations && VT == MVT::i1)) {
SDValue Or = DAG.getNode(ISD::OR, SDLoc(N0), LR.getValueType(), LL, RL);
AddToWorklist(Or.getNode());
@@ -3196,7 +3195,6 @@ SDValue DAGCombiner::foldAndOfSetCCs(SDValue N0, SDValue N1, const SDLoc &DL) {
if (isAllOnesConstant(LR)) {
// fold (and (seteq X, -1), (seteq Y, -1)) -> (seteq (and X, Y), -1)
if (CC1 == ISD::SETEQ) {
- EVT CCVT = getSetCCResultType(LR.getValueType());
if (VT == CCVT || (!LegalOperations && VT == MVT::i1)) {
SDValue And =
DAG.getNode(ISD::AND, SDLoc(N0), LR.getValueType(), LL, RL);
@@ -3206,7 +3204,6 @@ SDValue DAGCombiner::foldAndOfSetCCs(SDValue N0, SDValue N1, const SDLoc &DL) {
}
// fold (and (setgt X, -1), (setgt Y, -1)) -> (setgt (or X, Y), -1)
if (CC1 == ISD::SETGT) {
- EVT CCVT = getSetCCResultType(LR.getValueType());
if (VT == CCVT || (!LegalOperations && VT == MVT::i1)) {
SDValue Or =
DAG.getNode(ISD::OR, SDLoc(N0), LR.getValueType(), LL, RL);
@@ -3216,11 +3213,11 @@ SDValue DAGCombiner::foldAndOfSetCCs(SDValue N0, SDValue N1, const SDLoc &DL) {
}
}
}
+
// Simplify (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)
- if (LL == RL && isa<ConstantSDNode>(LR) && isa<ConstantSDNode>(RR) &&
- CC0 == CC1 && LL.getValueType().isInteger() && CC0 == ISD::SETNE &&
- ((isNullConstant(LR) && isAllOnesConstant(RR)) ||
- (isAllOnesConstant(LR) && isNullConstant(RR)))) {
+ if (LL == RL && CC0 == CC1 && LL.getValueType().isInteger() &&
+ CC0 == ISD::SETNE && ((isNullConstant(LR) && isAllOnesConstant(RR)) ||
+ (isAllOnesConstant(LR) && isNullConstant(RR)))) {
EVT CCVT = getSetCCResultType(LL.getValueType());
if (VT == CCVT || (!LegalOperations && VT == MVT::i1)) {
SDLoc DL0(N0);
@@ -3231,7 +3228,8 @@ SDValue DAGCombiner::foldAndOfSetCCs(SDValue N0, SDValue N1, const SDLoc &DL) {
DL, VT, Add, DAG.getConstant(2, DL, LL.getValueType()), ISD::SETUGE);
}
}
- // canonicalize equivalent to ll == rl
+
+ // Canonicalize equivalent operands to LL == RL.
if (LL == RR && LR == RL) {
CC1 = ISD::getSetCCSwappedOperands(CC1);
std::swap(RL, RR);
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