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| author | Pete Cooper <peter_cooper@apple.com> | 2012-04-04 21:03:25 +0000 |
|---|---|---|
| committer | Pete Cooper <peter_cooper@apple.com> | 2012-04-04 21:03:25 +0000 |
| commit | d7290700e64b5732ac20fb4e89940baa46d9b31d (patch) | |
| tree | a6dde4b7469e3c52817f1201b87a124442ead0ac /llvm/lib/CodeGen | |
| parent | d1717c1aed90579971c1a8f3ae2e2743387c2018 (diff) | |
| download | bcm5719-llvm-d7290700e64b5732ac20fb4e89940baa46d9b31d.tar.gz bcm5719-llvm-d7290700e64b5732ac20fb4e89940baa46d9b31d.zip | |
REG_SEQUENCE expansion to COPY instructions wasn't taking account of sub register indices on the source registers. No simple test case
llvm-svn: 154051
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/TwoAddressInstructionPass.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp index 93c7e962e16..8f260800cc5 100644 --- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -1832,6 +1832,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() { SmallSet<unsigned, 4> Seen; for (unsigned i = 1, e = MI->getNumOperands(); i < e; i += 2) { unsigned SrcReg = MI->getOperand(i).getReg(); + unsigned SrcSubIdx = MI->getOperand(i).getSubReg(); unsigned SubIdx = MI->getOperand(i+1).getImm(); // DefMI of NULL means the value does not have a vreg in this block // i.e., its a physical register or a subreg. @@ -1887,7 +1888,7 @@ bool TwoAddressInstructionPass::EliminateRegSequences() { MachineInstr *CopyMI = BuildMI(*MI->getParent(), InsertLoc, MI->getDebugLoc(), TII->get(TargetOpcode::COPY)) .addReg(DstReg, RegState::Define, SubIdx) - .addReg(SrcReg, getKillRegState(isKill)); + .addReg(SrcReg, getKillRegState(isKill), SrcSubIdx); MI->getOperand(i).setReg(0); if (LV && isKill && !TargetRegisterInfo::isPhysicalRegister(SrcReg)) LV->replaceKillInstruction(SrcReg, MI, CopyMI); |

