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authorSimon Pilgrim <llvm-dev@redking.me.uk>2019-07-11 14:45:03 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2019-07-11 14:45:03 +0000
commitd0307f93a7658e6d0eef1ffd0b0ed4f1506bfc13 (patch)
treec3dcd1663db7fc6e15ad41249113f21337aa2fbe /llvm/lib/CodeGen
parent6eb8ae8f17b4f4ae2523dba3207ef9e2aadc2ad6 (diff)
downloadbcm5719-llvm-d0307f93a7658e6d0eef1ffd0b0ed4f1506bfc13.tar.gz
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[DAGCombine] narrowInsertExtractVectorBinOp - add CONCAT_VECTORS support
We already split extract_subvector(binop(insert_subvector(v,x),insert_subvector(w,y))) -> binop(x,y). This patch adds support for extract_subvector(binop(concat_vectors(),concat_vectors())) cases as well. In particular this means we don't have to wait for X86 lowering to convert concat_vectors to insert_subvector chains, which helps avoid some cases where demandedelts/combine calls occur too late to split large vector ops. The fast-isel-store.ll load folding regression is annoying but I don't think is that critical. Differential Revision: https://reviews.llvm.org/D63653 llvm-svn: 365785
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp18
1 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 320db83566b..c7c31d8a5b9 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -18002,11 +18002,21 @@ static SDValue narrowInsertExtractVectorBinOp(SDNode *Extract,
SDValue Index = Extract->getOperand(1);
EVT VT = Extract->getValueType(0);
+ // Helper that peeks through INSERT_SUBVECTOR/CONCAT_VECTORS to find
+ // if the source subvector is the same type as the one being extracted.
auto GetSubVector = [VT, Index](SDValue V) -> SDValue {
- if (V.getOpcode() != ISD::INSERT_SUBVECTOR ||
- V.getOperand(1).getValueType() != VT || V.getOperand(2) != Index)
- return SDValue();
- return V.getOperand(1);
+ if (V.getOpcode() == ISD::INSERT_SUBVECTOR &&
+ V.getOperand(1).getValueType() == VT && V.getOperand(2) == Index) {
+ return V.getOperand(1);
+ }
+ auto *IndexC = dyn_cast<ConstantSDNode>(Index);
+ if (IndexC && V.getOpcode() == ISD::CONCAT_VECTORS &&
+ V.getOperand(0).getValueType() == VT &&
+ (IndexC->getZExtValue() % VT.getVectorNumElements()) == 0) {
+ uint64_t SubIdx = IndexC->getZExtValue() / VT.getVectorNumElements();
+ return V.getOperand(SubIdx);
+ }
+ return SDValue();
};
SDValue Sub0 = GetSubVector(Bop0);
SDValue Sub1 = GetSubVector(Bop1);
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