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authorAnton Korobeynikov <asl@math.spbu.ru>2009-05-08 18:51:34 +0000
committerAnton Korobeynikov <asl@math.spbu.ru>2009-05-08 18:51:34 +0000
commitc94dbf5ba0ebf8f1a0ff845512b00a41fe8aa634 (patch)
tree718f7bcd3281dcf548571b81d529113185a4270e /llvm/lib/CodeGen
parentea618dd0ba5cb5ba5f6772fc51eb4703e714cd72 (diff)
downloadbcm5719-llvm-c94dbf5ba0ebf8f1a0ff845512b00a41fe8aa634.tar.gz
bcm5719-llvm-c94dbf5ba0ebf8f1a0ff845512b00a41fe8aa634.zip
Do not emit bit tests if target does not support natively left shift
llvm-svn: 71240
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index fd89108392c..d0fd6b4f64c 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -1923,6 +1923,10 @@ bool SelectionDAGLowering::handleBitTestsSwitchCase(CaseRec& CR,
// inserting any additional MBBs necessary to represent the switch.
MachineFunction *CurMF = CurMBB->getParent();
+ // If target does not have legal shift left, do not emit bit tests at all.
+ if (!TLI.isOperationLegal(ISD::SHL, TLI.getPointerTy()))
+ return false;
+
size_t numCmps = 0;
for (CaseItr I = CR.Range.first, E = CR.Range.second;
I!=E; ++I) {
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