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authorEvan Cheng <evan.cheng@apple.com>2008-09-10 00:30:50 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-09-10 00:30:50 +0000
commitc6db3ad15f41e9719ac946c0162ef98623d96afb (patch)
tree269fb635a26fb7390bdb221683204b98c4d4b404 /llvm/lib/CodeGen
parenteb1db169bfaaf7190ba7667bf6fccf2992ab900f (diff)
downloadbcm5719-llvm-c6db3ad15f41e9719ac946c0162ef98623d96afb.tar.gz
bcm5719-llvm-c6db3ad15f41e9719ac946c0162ef98623d96afb.zip
Fix typo.
llvm-svn: 56037
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r--llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 5a386dde068..cca891d7735 100644
--- a/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/llvm/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -1029,10 +1029,10 @@ bool SimpleRegisterCoalescing::JoinCopy(CopyRec &TheCopy, bool &Again) {
mri_->getRegClass(isExtSubReg ? SrcReg : DstReg);
if (isExtSubReg) {
RealDstReg = getMatchingSuperReg(DstReg, SubIdx, RC, tri_);
- assert(RealDstReg && "Invalid extra_subreg instruction!");
+ assert(RealDstReg && "Invalid extract_subreg instruction!");
} else {
RealSrcReg = getMatchingSuperReg(SrcReg, SubIdx, RC, tri_);
- assert(RealSrcReg && "Invalid extra_subreg instruction!");
+ assert(RealSrcReg && "Invalid extract_subreg instruction!");
}
// For this type of EXTRACT_SUBREG, conservatively
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